PWB Back Drilling Failure Analysis
Back drilling or controlled depth drilling of plated through holes (PTH) is increasingly being used in High Speed Designs. While back drilling of PWB's helps to remove signal distortion by removing via related stubs, reliability issues attributed to this practice appear to be on the rise. The drivers for this project include the lack of Design Guidelines, PWB Fabrication Tolerances, Material and Lead Free Assembly. This project also evaluated new electrical methodologies for measuring copper stub length and depth of the backdrill along with determining exactly where the layer of interest (no cut) lies in the PCB board stack up.
Focus/Area of Concern: This project explored the reason for back drilling related PWB failures and to identified potential solutions and design/process guidelines to prevent future problems associated with this process.
· The project assessed the backdrill capability of the Industry through a survey. The Survey targeted both OEM and PCB fabricators. The results were coded to keep all data anonymous.
· Evaluated the reliability of backdrilled via compared to standard plated through hole. Designed a set of IST coupon that were tested as received, pre-conditioned (6X @ 260 C) and after simulated reflow.
· Developed and analyzed a series of electrically testable backdrill coupons for stub length and inner layer laminate thickness measurement
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Back drilling or controlled depth drilling of plated through holes (PTH) is increasingly being used in High Speed Designs. While back drilling of PWBs helps to remove signal distortion by removing via related stubs, reliability issues attributed to this practice appear to be on the rise.
Both the number of back drilled vias and the variation of depths (any & all layers) are increasing on each board. Reliability issues with back drilling is often related to an unique family of products (Design/Material/Process).
Design Rules are driven by Electrical requirements, not necessarily based on PWB reliability data, PWB fabrication capabilities or the effects of higher Lead Free assembly for higher layer count boards.
Part 1: Assessing the capability of the Industry through a 1:1 survey. The 1:1 Survey will target both OEM and PCB fabricators. Personal teleconferences (recommended) to each contact to answer questions on the survey. The results will be company coded to keep all data anonymous.
- Survey to find out what design tolerances/stub lengths are being designed into products now and 3 years into the future. This will be sent to design houses and OEM/ODM’s.
- Survey to find out what problems fabricators see in supporting this level of technology/tolerance and what would be needed to comply with the requirements. Survey to identify problems with PCB Fabrication such as tolerance based on equipment, control methodology for debris in hole, depth control, etc.
Part 2: Testing and Verification of the reliability and capabilities found from the Phase 1 surveys. This will be done by designing a coupon and test vehicle that will be built and tested by the project. This would be an electrically tested coupon (with micro-sectioning only as needed)
Part 3: Develop a realistic set of design guidelines for several levels of PCB Fabrication capabilities (high end and mainstream fabricators).
•Quantify the relative reliability of shallow, medium and deep backdrilled holes.
•Quantify the influence of hole size, pad size and pitch on backdrilled hole reliability (0.032”, 0.040” and 0.080” pitch).
•Compare the variation in backdrilled hole reliability from different PWB suppliers