Lead Free PWB Materials Reliability Phase 4

Phase 4 of the Lead-Free PWB materials reliability program evaluates selected latest generation high speed PWB laminates. As with previous phases the focus will be on how the chosen materials  will perform mechanically and electrically when exposed to higher end Pb-Free surface mount reflow temperatures, typical of the conditions needed to assemble large, thick and high complexity printed circuit board designs. The testing program will monitor for any delamination issues, CAF concerns, and thermal cycling performance. Furthermore, electrical properties will be evaluated both before and after reflow. 
 
 
Project stage: 
Project type: 
Lead company: 
Juniper

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Idea Information

Background: 

The first phase of the LF PWB materials reliability project was launched in 2006 in response to the introduction of the ROHS directive in Europe. While system integrators were granted exemptions on many of their high reliability products, concerns existed that the higher Pb-free reflow temperatures needed to solder non-consumer, larger, high layer and densely populated printed circuit boards could cause thermal damage and de-lamination within the board materials. Initiated by several of the organization's OEM members, the project team selected several different laminates from various suppliers and tested them before and after conditioning them, using a reflow profile peaking at 260 deg C, significantly higher than the 245 deg. C typically used by vendors to qualify their materials. In order to simulate real manufacturing and rework conditions each test board was submitted to 6 reflow cycles. The results from phase 1 indicated that significant damage was seen on many of the laminates studied, much of which was not apparent from visual inspection but could potentially lead to latent defects in the field. Since phase 1 , 2 further phases of testing have been competed, targeting materials recently released at the time of the testing.   To date, a total of 56 different materials have been tested with later released products exhibiting much improved results but with several still indicating that they can not completely withstand the 6 x reflow cycles.

Problem: 

Since initiating phase 3 of this test program a large range of new laminate systems have been developed and released to the market. As with previous materials, qualification programs conducted elsewhere on these products have typically been  undertaken using lower SMT reflow temperatures than would typically be needed for manufacture of high end, high complexity printed circuits boards. Concern still exists among HDP members about the robustness of these new materials. The project therefore sets out to test them using similar criteria to that used in the previous phases of this project.

 

Definition Information

Goals / Benefits: 

The project has one primary goal:

Evaluate a selection of latest generation high speed laminate materials to determine their suitability for high layer count and large area printed circuit boards used for high reliability applications.

High level objectives: 

 

  • Identify 12 latest generation high speed PWB materials for evaluation
  • Fabricate and  pre-condition (50%) test boards using 6 x surface mount (260 deg C peak) reflow cycles.
  • Conduct extensive test program to assess performance.
  • Rank and compare results for each test including as built versus pre-conditioned test boards.
Approach: 

The project will use a dedicated 20 layer test vehicle printed wiring board (MRT-5) developed and fine tuned during previous phases of the project. For each materials 2 layer constuctions with different glass cloths and resin contents will be used. - A lower resin content construction using 2116 glass cloth  (53% resin content) in the laminate and 1080 glass cloth (62% resin content) and a high resin content construction using laminate with 106 glass cloth (71% resin content) and pre-preg with 67% resin conetnt 1080 glass cloth. Various test coupons are incorporated in the design to enable the diffrent tests planned to be undertaken. Internal scoring and routing of the board allows the different coupons to be broken out without stressing the board and distributed to the relevant laboratories for testing.

 MRT -5 Test Vehicle

 A total of 20 boards will be manufactured for each material/construction combination. 50% of the baords will be pre-conditioned by exposing them to 6 reflow cycles through a standard production SMT conduction reflow oven with a simulated assembly reflow profile peaking at 260 degrees C. All coupons (as builts and pre-conditioned) within the boards are then subjected to a series of tests to assess mechanical integrity and electrical performance.

 

Phase 4 Test Plan

Key Participants: 
Celestica
Ciena
Curtiss-Wright
Doosan / Circuit Foil
Elite Material Co. EMC
Flex
Fujitsu
Hitachi Chemical
IBM
Isola Group
ITEQ
Oracle
Panasonic
Park Electrochemical
PWB Interconnect Solutions
Shengyi
TTM Technologies
WUS
Public